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Semicinductors industry has serious issues, stop will follow
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  • The Korean giant reportedly has lowered foundry quotes in order to win clients from the Taiwan-based competitor, who sees tight capacity at its advanced nodes because of strong demand.

    It is no accident that US put in jail Samsung leader, as it is big war on last silicone processes coming.

    TSMC is now king of mountain, but is risking a lot, any failure with 5nm-3nm and all this fanfares can turn into extreme issues. Just look at Intel.

  • Samsung is unable to do complex 7nm EUV in volume

    During GTC 2019 in Suzhou, China, NVIDIA's CEO responded to the press that the majority orders of their next-generation 7nm GPU will be handled by TSMC with Samsung only playing a small role than previously reported.

    It is interesting as whole chips had been designed with Samsung process in mind, as I understand problems originate in early 2019 and made Nvidia unable to launch new cards as planned already.

  • From interview with AMD

    AMD’s current highest TDP processor on the market today is at 280W, such as the EPYC 7H12 built for HPC. Is there an upper limit to TDP expansion? We see Intel moving into the market with higher TDP chips, at 350-400W TDPs.

    Collaboration with our OEM partners isn’t just about maximizing the power available for the CPU. You also work across both CPU and GPU, and that’s what we’re doing with Cray/HPE for the Frontier supercomputer. That’s really indicative of the kind of system optimization across hardware and the system and software stacks that we can do with OEM partners to really push up the roof in the HPC market.

    We announced that 7H12 part in our continued roll out of Rome, and you saw ATOS use it and we were really happy for them to see their placement to catch the Top500 listing as it was a race against time, but it just shows what you can do with great execution. But you know when you think about that time of integrated water cooled solution, it tells you that you have to grow these close partnerships, as we’re doing at AMD with our OEM customers, and there’s a lot more performance that can be had going forward. There’s a lot more room at the top!

    AMD will hit TDP already in 2020. And issue is not just total TDP but simple fact that smaller dies are unable to transfer heat enough with their small surface.

  • TSMC will be sole foundry partner of Apple iPhone chips for 2020. Volume production using 5nm EUV process will kick off by the end of second-quarter 2020. As much as two thirds of TSMC's available 5nm process capacity will be utilized to make the next-generation iPhone chips

  • TSMC's 7nm production capacity is fully booked. Relief may only come when Apple migrates to 5nm in 2H'2020. TSMC's 7nm capacity will increase to 140,000 wpm in 2H'2020. By order proportion, the ranking of customers using 7nm will be re-shuffled. AMD's orders are set to double, replacing Apple as the largest customer [for 7nm]. Huawei's HiSilicon and Qualcomm are similar by order proportion.

    TSMC's 7nm production capacity continues to rise. The industry expects monthly capacity to reach 110,000 wafers in 1H'2020. The top 5 customers by order proportion are: Apple, HiSilicon, Qualcomm, AMD, and Mediatek. Except for Mediatek, order share is split at roughly 20% each, depending on seasonality. Mediatek's share is around 13%.

    However, with 7nm capacity rising to 140,000 wpm in 2H'2020, and the largest customer Apple migrating to 5nm with the A14 processor, customer ranking by 7nm orders will be re-shuffled. In one fell swoop, AMD booked capacity for 30,000 wafers, accounting for 21% of total capacity. HiSilicon and Qualcomm's orders are similar, at 17-18%. Mediatek's share also rose to 14%.

    Samsung's 7nm production capacity is now roughly 150,000 wpm. It is also actively increasing 7nm capacity. According to industry rumors, Samsung plans to quadruple capacity in 2020. Nvidia and Qualcomm's next-generation products may be produced using Samsung's 7nm EUV process.

    I have big doubt about Samsung capacity if it concerns anything besides their own LSI.

    Nvidia already has huge issues because largest shareholders ordered them to use inferior and not ready Samsung process. But it did not work as expected.

    In 2020 we will see idea to make Intel-AMD like monopolies duality from TSMC and Samsung. Intel will be lagging more and more and we can even expect 7nm closure announcement in 2021.

  • Pure-play foundry Taiwan Semiconductor Manufacturing Company (TSMC) saw its revenues grow by a slight 3.7% in 2019. TSMC reported consolidated revenues hit a record high of NT$1.07 trillion (US$35.7 billion) in 2019. Revenues for December 2019 came to NT$103.31 billion, down 4.2% on month but up 15% from a year earlier. TSMC saw its fourth-quarter revenues amount to NT$317.24 billion, up about 8% sequentially and hitting a record high for the second consecutive quarter.

    Things are not bad, but it seems like crypto mining fade played bad thing with TSMC (they had been biggest manufacturer of crypto shite that produced heat in exchange to dollars). As 3.7% only rise while AMD is making huge profits is not normal.

    We can see consequence of all this in 1-2 years, as smartphone market fade can be killer blow for both TSMC and Samsung.

  • TSMC 7nm process lead time remains at about six months, with tight supply expected to last through 2020, or even worsened in the second half of the year if speculation about Intel possibly seeking to place orders for the Taiwanese foundry's advanced processes materializes, according to industry sources.

    Someone clearly lie to public. As all this AMD public fanfares are not supplied by proper steady manufacturing.

  • Some problems of Intel

    Increasing die size


    As Intel being run by greedy investors did not want to invest proper money in 14nm equipment hoping for simple 10nm transition.


    So, from max of 136 millions CPUs per quarter they went down.

  • Intel dropped the price of some of their most expensive Xeons by 28%, more as you go down the stack. Before you get excited about your server prices in Q1 doing the same after a phone call to your OEM and a re-bid, lets just say this won’t happen unless you are a select few customers. Which customer? Those who bought the -M and -L large memory SKUs, roughly 2% of sales according to informal numbers.

    Intel price cuts will soon spread wider, and note that Xeon margins are exorbitant (same as AMD server CPUs).

  • We will announce more details about our N3 technology at our TSMC North America Technology Symposium on April 29

    3nm development, and it can be first process where TSMC can fail miserably.

  • Intel is expected to initiate price cuts on its PC processors in the second half of 2020 to defend its market dominance, according to sources at PC makers.

    It is extremely dangerous for Intel, as any fund shortages can lead to lot of problems, and like GF Intel could be stuck in them indefinitely.

  • We’ve now reached 2020 and so the certainty that we will always have sufficiently powerful computing hardware for our expanding needs is beginning to look complacent. Since this has been obvious for decades to those in the business, there’s been lots of research into ingenious ways of packing more computing power into machines, for example using multi-core architectures in which a CPU has two or more separate processing units called “cores” – in the hope of postponing the awful day when the silicon chip finally runs out of road.

  • Gartner predictions also show that AMD won't continue to add cores and performance so fast.


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  • Major issue - is money start flowing out of the bubble all things will stop


  • L4 cache as dead end

    “At some level, another level of cache is inevitable,” says Gianos. “We had a first level of cache and eventually we had a second. And eventually we added a third. And eventually we will have a fourth. It’s more of a question of when and why.

    The architects at AMD, who did not want to be directly attributed because in having this conversation they did not want to be misconstrued with AMD promising that it would be adding L4 cache to the Epyc processor line – and to be clear, AMD has said nothing of the kind. But it did recognize that it is the next obvious thing to be thinking about, and just like Intel, believes that every architect is thinking about L4 caches, and it shared some of its thinking on background. Basically, AMD says that the tradeoff in number of cache layers and latency has been well studied in industry and academia, and that with each new cache layer, which is bigger, slower, and more widely accessed, there is a necessary tradeoff that increases the total path out to the DRAM because most designs would not continually speculatively access the cache layers further down in the hierarchy in parallel with cache tag lookup in the upper layers. This is exactly what Intel is also talking about above when Gianos says you need to find a balance between the hit rate and the capacity of the cache – and the L4 is no different.

    Big L4 cache is expensive, eats silicon manufacturing capacity and do not bring much of performance increase outside of specific tasks.

  • Something interesting coming up or ASML shares

    Intel got rid of all AMSL block of shares it owned (had been 15%), final parts had been sold during 2019.

    Samsung and TSMC also sold all of their ASML stock.

    It can't be good sign, as, most probably all companies see some HUGE problems ahead to act such.

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  • Rumors are spreading that due to TSMC capacity issues and possible issues with 7nm EUV process, AMD can shift Ryzen 4000 release to November 2020 or even CES 2021.

  • Good articles on 7nm AMD chips

    AMD has reduced the size of the Core Complex (CCX), a cluster of Zen CPU cores, to about 50% of the 14-nm process generation by moving to the 7-nm process. Compared with the same amount of cache SRAM, the size is about half, and the density of transistors is almost doubled.

    The size of CPU cores has also been reduced by half, and as a result, the number of CPU cores installed in the APU (Accelerated Processing Unit) aimed at the main stream has been doubled to eight.

    However, this ratio is a bit strange, considering the miniaturization scenario of the conventional CMOS process.

    AMD has skipped 10nm, the next process after 14nm, and is moving to a 7nm process. In the process node, the migration is for two generations. This means that the process has been reduced to 50% by miniaturizing the process for two generations. However, with traditional CMOS scaling, if the number of nodes is the same, the CPU core area should be 25%.

    The traditional CMOS scaling rule states that a generation of process nodes reduces device area by 50%, thereby doubling transistor density. 4 times for 2 generations. In other words, the area should be 50% at 10nm from the 14nm process and 50% at 10nm to 7nm.

    As a result, at 7 nm versus 14 nm, the same core die area is reduced to 25%. According to AMD, this is half the scale of traditional scaling.

  • On CPU progress limits


    CPU scaling has really slowed and there's just no two ways about it. It's not a marketing thing. It's a physics thing. And the ability for CPUs to continue to scale without increasing cost or increasing power has ended. And it's called the end of Dennard scaling. And so there has to be another approach.

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  • Intel slashed Xeon prices, and by slashed we mean far more than 50%, but the MSRP didn’t change. Officially there was no change, that pipsqueak AMD has no effect on pricing, carry on folks and look away. Unofficially if you showed your friendly OEM a bid with an AMD CPU there were enough MeetComp dollars flowing to drop prices 2/3rds or more.

    Xeon pricing will have huge impact on Intel.

    Most probably we'll never see 7nm from them, especially if they will start having issues with notebook CPU prices (and this is second category with huge profits).

  • Intel Corp. is laying off 128 workers at four locations at its Santa Clara headquarters.

    The cuts follow the chipmaker's confirmation last month that it would cut roles as it shifts resources. The layoffs will take place by March 31, according to the filings with the EDD

    And it is only small start.

  • TSMC has started reducing its chip capacity support for Huawei, but is still working closely with the China-based vendor in the development for advanced 5nm and 3nm chip solutions.

    And this is very dangerous. As can also mean the end of TSMC as leading suplier.

    US very much wants Intel to be one, but they are failing.