Samsung progress with SRAM

https://www.eetimes.com/document.asp?doc_id=1332965

Interesting comparison of processes (it is prognosis for 2020 year processes)

https://www.eetimes.com/document.asp?doc_id=1332860

At CES 2018 Gregory Bryant told that high volume 10nm processor delivery to companies will start only in second half of 2018, may be closer to the end of year.

Serious issues with Intel 10nm process

To say yields were bad was understating things to a degree that even the classic British humorists would not dare to delve. Normally from tapeout to product on the shelves, Intel takes ~12 months for server SKUs, less for consumer. According to SemiAccurate moles, it has been ~16 months and counting.

Intel is insistent nothing is wrong but if you look at their recent Manufacturing Day messaging, one thing stood out. That thing is 20+ years of stating process progress was overturned with a new way of measuring progress that said that the 2+ year slip, at that time, for the 10nm process was not actually a problem, it was a technological breakthrough instead.

If you look at Intel roadmaps, the cadence should have gone 32nm (Westmere/Arrandale) in 2010, Sandy Bridge in 2011, Ivy Brige in 2012, Haswell in 2013, Broadwell in 2014, Sky Lake in 2015, Cannon Lake (10nm) in January 2016, Icelake (10nm) in January of 2017, and Tigerlake/Firelake (7nm) at CES in about 2 weeks aka January 2018. Instead there were the slips described above and Cannon, due ~2 years ago, isn’t out. Instead we have multiple “new architectures” that seem to pop up on the Intel roadmaps as soon as OEMs need to start production on the 10nm parts that were previously there.

10nm is now set for late 2018, officially, and that is where things really begin.

https://semiaccurate.com/2017/12/20/state-intels-10nm-process/

Intel will use cobalt in on the bottom two layers of its 10-nm interconnect to get a five- to ten-fold improvement in electromigration and a two-fold reduction in via resistance. It represents the first time that a chip maker has detailed plans to introduce cobalt — a brittle metal long considered a promising dielectric candidate — in a process, according to G. Dan Hutcheson.

Globalfoundries, which has said previously that it would insert EUV at the 7-nm node, detailed a platform that is entirely based on immersion optical lithography but is designed to enable the insertion of EUV for specific levels to improve cycle time and manufacturing efficiency. Gary Patton, Globalfoundries chief technology officer and senior vice president of global R&D, said in an interview with EE Times that kinks in EUV still need to be worked out — chiefly pellicle and inspection technologies — but that Globalfoundries is currently installing its first EUV production tools at its Fab 8 in upstate New York.

https://www.eetimes.com/document.asp?doc_id=1332696

AMD forgot to add that most progress is due to more cores :-)

And here it is

AMD also said that they expect same size 7nm die CPU and GPUs to be twice more expensive.

Samsung Electronics secured new customers from the U.S. and China for its 7-nano foundry business. This indicates that it succeeded in making a counterattack after it lost rights to produce Qualcomm’s 7-nano chips to TSMC. It is heard that it is finalizing a negotiation with Hwasung-si regarding construction of new 7-nano plant and finalize administrative procedures early December at the earliest. Positive forecast is seen for its 7-nano foundry business.

Qualcomm and Broadcom are designing next-generation chips through TSMC’s7-nano PDK. TSMC is planning to produce 7-nano chips by using normal steppers repeatedly. Due to this reason, many customers including Qualcomm decided to mass-produce their first 7-nano chips through TSMC.

It is expected that Samsung Electronics will be slightly late in commercializing 7-nano process than TSMC. However it has been emphasizing that its 7-nano process that is applied with EUV (Extreme Ultraviolet) photolithography technology is truly the next-generation process from all aspects such as area, performance, and amount of electricity consumption.

So, finally they are forced to do EUV.

Intel 10nm state

Intel and Globalfoundries will describe their 10nm and 7nm process nodes, respectively at the International Electron Devices Meeting (IEDM) in December. The event also will host papers pointing to new directions in memories, medical and flexible electronics and transistors beyond today’s FinFETs.

Intel will discuss several aspects of its 10nm node first unveiled in March. It sports FinFETs with a 7nm fin width at a 34nm pitch and a 46nm fin height made using self-aligned quadruple patterning. A 204 Mbit SRAM made in the process packs separate high-density, low voltage and high-performance cells that measure from 0.0312µm2 to 0.0441µm2.

Intel afraid of EUV

A race is on to qualify advanced semiconductor process technologies using extreme ultraviolet (EUV) lithography, but Intel is said to be sitting on the sidelines.

Samsung and TSMC are racing to announce some level of manufacturing with EUV next year. But Intel is said not to be ordering materials needed for EUV at the same rate, according to one source that asked not to be named.

Nvidia founder and CEO Jensen Huang said that with the emergence of GPU computing following the decline of the CPU era, Moore's Law has come to an end. Huang made the statement when delivering a keynote speech at the GPU Technology Conference (GTC) China 2017, held on September 26 in Beijing.

Remarks came in sharp contrast to an earlier statement that Moore's Law will not fail, as issued by Intel at its Technology and Manufacturing Day held also in Beijing, on September 19, when the company provided updates for its 10nm process.

End for GPUs will be even harder and sharper.

Intel Cannon Lake architecture will contain only small mobile CPUs.

Intel now is unable to produce 10nm big complex chips without very low yield rate.

Si it'll be around 2019 as you could see any 10nm desktop CPUs.